Boards
A routed board, from a prototype pipeline.
A LiPo charger, taken from netlist to a routed board with 3D renders. The placement pipeline is a prototype today — the durable version is placement rules as data, on the roadmap. The schematics and netlists are the engine's own output.
The schematic
The engine's own output, not a redraw.
Every symbol, wire and label was emitted by the compiler from the validated design — pin types verbatim from KiCad's enum, nets derived at compile time, references sequential. No hand-drawing, and the model never touches the file.
TP4056 · USB-C in · JST battery out · exported straight to .kicad_sch, netlist and BOM.
Open full size →The board
LiPo charger
TP4056 charger, USB-C input, JST battery output. Shelf-packed linear placement: input connector, part shelves, output connector — with plug clearances taken from connector-family rules, not guesses.
placementlinear · shelf-packed
clearancesUSB-IF · JST
silkB+/B− from pad nets
poursGND, both sides
The pipeline
Netlist to raytrace, no hands on the mouse.
01
Place
Courtyard packing or shelf mode, edge pass, plug clearances from rules.
02
Inject nets
Saving the board in KiCad discards net tables added from Python, so they are re-injected after every save.
03
Autoroute
Headless, via Specctra DSN out and SES back in.
04
Refill pours
Zones filled, board saved, nets injected again.
05
3D + render
GLB with tracks, pads, silkscreen and soldermask, plus a top raytrace.
Every one of these steps costs a debugging round to get right, and each is written down. That's the same discipline the engine applies to arithmetic — applied to the toolchain.
Which board should be next?
Design partners pick the target. Tell us what you're building and the parts it needs — they go to the front of the verification queue.